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Bit
Field
Value
Description
[13:4]
[3]
n_minus_1
next_useburst
N
-
1
Configures the controller to perform N DMA transfers, where N is a multiple of four
When set to 1, the controller sets the chnl_useburst_set [C] bit to 1 after the
Because the R_power field is set to four, you must set N to be a multiple of four. The value given by N/4 is the number of times
alternate transfer completes
1
that you must configure the alternate data structure.
See Section 8.4.3.3 (p. 53) for more information.
Figure 8.5 (p. 49) shows a peripheral scatter-gather example.
Figure 8.5. Peripheral scatter-gather example
Initialization: 1. Configure prim ary to enable the copy A, B, C, and D operations: cycle_ctrl = b110, 2 R = 4, N = 16.
2. Write the prim ary source data in m em ory, using the structure shown in the following table.
src_data_end_ptr
dst_data_end_ptr
channel_cfg
Unused
Data for Task A
Data for Task B
Data for Task C
Data for Task D
0x0A000000
0x0B000000
0x0C000000
0x0D000000
0x0AE00000
0x0BE00000
0x0CE00000
0x0DE00000
cycle_ctrl = b111, 2 R = 4, N = 3
cycle_ctrl = b111, 2 R = 2, N = 8
cycle_ctrl = b111, 2 R = 8, N = 5
cycle_ctrl = b001, 2 R = 4, N = 4
0xXXXXXXXX
0xXXXXXXXX
0xXXXXXXXX
0xXXXXXXXX
Peripheral scatter-gather transaction:
Pr im a r y
Copy from A in
Alt e r n a t e
For all prim ary to alternate transitions,
the controller does not enter the
arbitration process and im m ediately
Request
m em ory, to Alternate
perform s the DMA transfer that the
alternate channel control data structure
specifies.
Task A
N = 3, 2 R = 4
Reques t
Copy from B in
m em ory, to Alternate
Task B
Request
Request
N = 8, 2 R = 2
Request
Reques t
Copy from C in
m em ory, to Alternate
Task C
N = 5, 2 R = 8
Reques t
Copy from D in
m em ory, to Alternate
Task D
In Figure 8.5 (p. 49) :
N = 4, 2 R = 4
dm a _don e [ C]
Initialization
1. The host processor configures the primary data structure to operate in peripheral
single channel consists of four words then you must set 2 to 4. In this example,
scatter-gather mode by setting cycle_ctrl to b110. Because a data structure for a
R
there are four tasks and therefore N is set to 16.
2. The host processor writes the data structure for tasks A, B, C, and D to the
memory locations that the primary src_data_end_ptr specifies.
3. The host processor enables the channel.
The peripheral scatter-gather transaction commences when the controller receives a request on
dma_req[ ] . The transaction continues as follows:
2011-04-12 - d0001_Rev1.10
49
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